why does my Makefile keep recompiling when there are no changes?

I have a makefile which looks like this

all:    all_functions
all_functions:  a_functions.o b_functions.o c_functions.o d_functions.o main.o a.h b.h c.h d.h main.h 
      gcc -o program1 a_functions.o b_functions.o c_functions.o d_functions.o main.o
a_functions.o:  a_functions.c a.h
      gcc -c -o a_functions.o a_functions.c
b_functions.o:  b_functions.c b.h
      gcc -c -o b_functions.o b_functions.c
c_functions.o:  c_functions.c c.h
      gcc -c -o c_functions.o c_functions.c
d_functions.o:  d_functions.c d.h
      gcc -c -o d_functions.o d_functions.c
main.o: main.c main.h
      gcc -c -o main.o main.c
clean:
      rm *.o program1
install:
      cp ./program1 "/usr/local/program1"
uninstall:
      rm "/usr/local/program1"

I have used tabs instead of spaces in my makefile.
When I do make -f Makefile, makefile compiles and creates program1 every time, even when the file exists and no changes were done. What is wrong with my makefile?
I expect to see an error message "make: Nothing to be done for.."

Asked By: javaprogrammer

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You’re using phony targets, i.e. targets with a useful name but whose recipes don’t produce the target. That is to say, make ends up trying to build the all_functions target, but the associated recipe doesn’t build anything named all_functions.

If you replace the first two lines with

all: program1
program1: a_functions.o b_functions.o c_functions.o d_functions.o main.o a.h b.h c.h d.h main.h

you should find that make behaves as you expect it to.

Answered By: Stephen Kitt
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